1. Field of the Invention
The present invention relates to a partial roll mode transfer between a random access main storage and a cyclic bulk memory, and more particularly to a latency reduction scheme for cylic bulk memory using existing standard channel facilities.
2. Statement of the Problem
Cyclic bulk storages such as disk files and drum files have been used as auxiliary storage devices of a data processing system. With the development of integrated circuit technology, it has recently been contemplated to use integrated circuit bulk memories such as CCD memories or magnetic bubble memories to take the place of conventional mechanical cyclic bulk storages. The CCD memories and magnetic bubble memories are called "electronic drum" files because of their functional resemblance to the classic drum file. Because of their cyclic nature such memories inherently present a delay between the start of an operation by a channel and the actual transfer of data. This delay, termed "latency", is due to the waiting time required for a starting address of the cyclic memory to come to a read/write port. In the worst case, the latency or waiting time amounts to a full circulation time of the drum file. This substantially degrades system performance. Techniques called "roll mode" transfer have been proposed to reduce the latency. When such cyclic memory files are coupled to a CPU main memory through a channel unit, however, the use of known or proposed roll mode transfer techniques requires addition to the channel of special functions which channels in existing systems such as IBM System/360 and IBM System/370 do not have.
3. Description of the Prior Art
IBM System/370 Principles of Operation, Form GA 22-7000-4, pages 185-242, describes the Input/Output operation of the IBM System/370. It explains, among other things, the functions of channel address words (CAW's), channel command words (CCW's), command chaining, the use of status modifier signals to control skipping functions in command chaining programs, channel indirect data addressing (CIDA), and the usage of indirect data address words (IDAW's).
U.S. Pat. No. 3,400,371 to G. M. Amdahl et al, issued Sept. 3, 1968 and assigned to the Assignee of the present application, shows a computer system designed for operating in accordance with a subset of the principles specified in the foregoing Principles of Operation publication, and exemplifying an embodiment of an IBM System/360 computing system. In the section of this patent entitled "Input/Output Operations" there are disclosed structures and operations of I/O channel facilities.
U.S. Pat. No. 3,400,372 to W. F. Beausoleil et al, issued Sept. 3, 1968 and assigned to the Assignee of the present application, shows a channel adapter which electronically connects a data channel of one CPU to a data channel of a second CPU.
U.S. Pat. No. 3,336,582 to W. F. Beausoleil et al, issued Aug. 15, 1967 and assigned to the Assignee of the present application, shows a communication system which connects I/O devices of differing data rates with a data processing system. Operation proceeds on an interlocked basis.
U.S. Pat. No. 3,488,633 to L. E. King et al, issued Jan. 6, 1970 and assigned to the Assignee of the present application, shows I/O channel apparatus for a data processing system. Logical circuitry is provided in the channel to provide for the assembly of bytes into words and to transfer the words to and from a storage in the data processing system. The data processing system may specify variable length fields which start and end on any byte position within a word.
U.S. Pat. No. 3,303,476 to J. T. Moyer et al, issued Feb. 7, 1967 and assigned to the Assignee of the present application, shows structure and functioning of I/O device control units which provide connection between I/O devices and an interface between the control unit and an I/O channel of a central processing system.
U.S. Pat. No. 3,411,143 to W. F. Beausoleil et al, issued Nov. 12, 1968 and assigned to the Assignee of the present invention shows a control apparatus for sequencing a series of I/O channel commands controlling the operation of a peripheral device of a data processing system. A series of operations at a peripheral device can be initiated by a CPU of the system which issues a start I/O instruction after which the CPU is free to carry on its own main program, the channel selecting its own command words from storage as required to carry out the sequence of peripheral operations. A signal from the peripheral device transmitted over an I/O interface is employed to select a new channel command word displaced in storage from the current command word by a predetermined number of storage locations thereby providing for branching on a condition determined by the peripheral device.
U.S. Pat. No. 2,840,304 to F. C. Williams, issued June 24, 1958 and assigned to National Research and Development Corp., shows the concept of "roll-mode" transfer between a drum storage and a main core storage utilizing a currently available drum position as the addressing control for main storage. One of the parallel recording tracks of the drum is utilized to record separate address indications representative of each of the word storage locations in the other tracks of the drum. These address indications are themselves related to appropriate address locations for the same words in the core storage. The signals obtained from such address track are used to control the setting of address selecting means of the core storage during transfer operations so that the address in the core storage which is active at any instant during a word transfer operation corresponds to the proper store location of that portion of any record track which is currently available for information transfer.
U.S. Pat. No. 2,925,587 to R. Thorensen et al, issued Feb. 16, 1960 and assigned to Secretary of Commerce, U.S.A. and U.S. Pat. No. 2,913,706 to R. Thorensen et al, issued Nov. 17, 1959, the latter patent being a division of the former patent, both deal with minimizing waiting time or access time in a magnetic drum memory system. Means are provided to transfer information in sizeable blocks from the magnetic drum memory to an electrostatic memory. The blocks of information are arranged on the drum to reduce "dead waiting time" for the drum, that is, the time taken for the drum to come to a specific position before transcribing can occur. The information comprising a block is stored sequentially around the circumference of the drum so that each block completely fills a respective band or channel on the drum. When a transfer to or from the drum memory is made, the entire channel is handled at one time and transfer of information starts immediately after the desired channel has been selected and continues for exactly one revolution of the drum.
IBM Customer Engineering Manual for the 7612 Disk Synchronizer, Form R23-9710, also discloses a roll-mode transfer technique to shorten access time in transferring complete tracks of information from a disk storage to a core storage. An entire track of information on the disk is transferred commencing with the beginning of any of eight separate sectors. Whereas "conventional" transfers would always start with the first data position of sector 0 and end with the last data position of sector 7, in roll mode the transfer may start at the beginning of any one of the eight sectors. The data word address in the transfer control word is modified to change the starting address of the core storage from the address assigned to word 0, sector 0 to the address allotted for word 0 of the sector in which the transfer actually starts. The position of the disk relative to the transducer is continuously indicated by a counter in a disk unit. Reading or writing begins at the start of the next sector-track to pass under the read or write heads, and continues for one full revolution (track) without changing track. The maximum access time is that required to reach the next sector-track, that is, one-eighth of one revolution time. When the disk reaches the end of sector 7, the address in the control word is altered to correspond to the beginning of sector 0. An orderly transfer of data is accomplished and causes the data to appear in the core storage in the same order as on the disk, starting at sector 0. After transfer, the data always appears in the correct and sequential locations of memory even though the transfer did not take place in the order specified by the original control word.
U.S. Pat. No. 3,341,817 to J. C. Smeltzer, issued Sept. 12, 1967 and assigned to the Bunker-Ramo Corp. handles data transfer between a cyclic memory, e.g., magnetic drum and a rapid random access memory, e.g. magnetic core memory. In this patent, an immediate transfer of information between the cyclic memory and the random access memory is effected by using the address of the information about to be read from the cyclic memory to define a location in the rapid access memory into which the information is written.
U.S. Pat. No. 3,654,622 to W. F. Beausoleil, issued Apr. 4, 1972 and assigned to the Assignee of the present application, shows a bulk storage made up of shift registers arranged in a three-dimensional memory matrix. Each shift register in the matrix has the capacity to store a plurality of bits, e.g. 256 bits. Each shift register can be shifted so that these bits are presented in a serial manner at the output of the shift register. Each shift register represents a bit position of a parallel word made up of a plurality of bits. Shift registers are arranged in columns and rows in a memory plane.
Japanese Published Unexamined Patent Application 52-64837 by T. Yamanoto, published May 28, 1977 and assigned to Nippon Telegraph and Telephone Public Corp., deals with information transfer between a serial memory, e.g. multiple parallel shift registers constructed out of CCD, BBD, or MOS transistors, and a rapid random access memory. It is directed to the partitioning of "tracks" in a serial access memory into "sector" divisions, and to initiation of read or write operations starting from the beginning of the most immediately available sector. According to the above patent application, the read or write operation can start at any available location address in a track. Means is provided to indicate a location address in the track which is currently available to a read/write port.
"Transparent Roll Mode for Rotating Device" by D. A. Stevenson, IBM TDB, Vol. 13, No. 1, June 1970, pages 93-95, discloses optional use of roll mode transfers normal accessing technqiues. The choice is based on the track length, the current position of a read or write head on the track, the offset of the beginning of the record on its first track, and the offset of the end of the record on its last track.